1. Field of Invention
The present invention relates to a chip structure. More particularly, the present invention relates to a chip with structural reinforcement between a bump on an under-bump metallurgy layer and a redistribution layer.
2. Description of Related Art
In the flip chip package technology, the chip is flipped over and then attached to a substrate or a printed circuit board (PCB). On the active surface of the chip, the bonding pads are arranged in area arrays, and an under-bump-metallurgy layer and a bump such as a solder bump are sequentially formed over each of the bonding pads. Then, the chip is flipped over and attached to the contacts on the surface of the substrate or a printed circuit board (PCB) via the bumps. The flip chip bonding technology is suitable to be used to fabricate chip packages with high pin counts. Due to the advantages of reducing package dimension and shortening signal transmission path in the package structure, the flip chip package technology has been widely adopted in the package fabrication.
As flip chip packages become popular, more and more products are packaged using the flip chip technique. However, changing the original chip design to fit the packaging mode is highly uneconomical. Hence, bonding pad redistribution technique has been developed to serve as a compromise to bridge the gap in this transition stage. Through a redistribution layer on the surface of a chip, the bonding pads close to the periphery region originally for bonding with bonding wires are redistributed into an array that facilitates the attachment of bumps in preparation for forming a flip chip package.
FIG. 1 is schematic cross-sectional view of a conventional chip structure. As shown in FIG. 1, the chip structure 100 mainly comprises a chip 110, a redistribution layer 120, a passivation layer 130 and at least a bump 150. The chip 110 has an active surface 112, a passivation layer 114 and at least a bonding pad 116. The passivation layer 114 and the bonding pad 116 are disposed on the active surface 112 of the chip 110. The passivation layer 114 exposes the bonding pad 116. The passivation layer 114 is fabricated using an inorganic compound including silicon oxide or silicon nitride, for example. The redistribution layer 120 is electrically connected to the bonding pad 116. The passivation layer 130 is formed over the redistribution layer 120. The passivation layer 130 has at least an opening 132 with sidewalls perpendicular to the active surface 112 of the chip 110 for exposing a portion of the redistribution layer 120. It should be noted that a conventional redistribution layer 120 is a composite stack film including four metallic layers such as titanium/copper titanium/copper. Thus, the redistribution layer 120 is able to serve also as an under-bump-metallurgy layer. The bump 150 is directly connected to the redistribution layer 120 exposed by the opening 132. Since SnPb alloy has a better bonding properties, the bump is normally fabricated using SnPb alloy having a Sn/Pb weight ratio between 63:37 to 5:95.
Because the bump 150 is connected to the redistribution layer 120 via the opening 132 in the passivation layer 130, the probability of the flip chip cracking or peeling is high during a shearing test. In other words, the lifetime of the chip will be reduced.